exercise12 chapter 1 (system designer's guide to VHDL AMS 2003)

This is a VHDL AMS simulation of a simple amplifier of gain 2 . This is the subject of exercise 12 of chapter 1 of the aforementioned book.

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astas

Joined October 23, 2018
Design added Sunday, October 28, 2018 | 9:59 am PDT

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