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KGyjoined June 27, 2017

posted Wednesday, July 12, 2017 | 8:05 am PDT

This thread has been created to discuss the design below. The person who started this thread can change this introductory post by clicking on the Edit button above.

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The goals of this design:
  • Balanced connection to the head
  • First stage of the amplifier is in the head shell
  • The head can be replaced by a MM/MI type together with its input stage (47 kohm version)
  • Each head can be fine-tuned by its own input stage
  • Balanced signal on the tonearm cable too
  • Extremely high radio-frequency immunity (including mobile-phone radio signals)

 

The q8 and q9 are placed in the headshell. They must be extremely low noise type (with very small internal Rb' resistance). Unfortunately, such transistor are high-frequency (microwave) types, triggering other problems (such as oscillation). The additional RC parts are necessary to prevent microwave oscillation.

 

The MM/MI input stage (with 47 kohm input) is not displayed here. It contains a double jFET device (U404), that's why it cannot be tested here (lack of jFET model).

 

The main amplifier starts with q4 aqnd q5. They also provide power for the input stage via the headshell cable.

 

The opamps op1 and op3 only for setting up the operating point of the input current mirror (eliminating the current differences produced by the input stage).

 

The op2 makes the correction.

 

I would like to approach the 0 dB noise figure this way as much as possible. This design helps me to analyze the possible noise sources.

Low noise tricks

As you say, the main noise source is the base resistance of the input transistors. A trick that I remember from 30 years ago is to use a power transistor instead. Even better: put a number of (those) transistors in parallel. 

To see the improvement you will need to use the real SPICE models as SV apparently does not model base resistance.

U404 JFET model

Hi György,

Thanks for sharing this!  I had to look up the meaning of RIAA.

Did you know that you can use SPICE models in SystemVision?  I found a Spice JFET library online that Gunthard Kraus put together.  I created a simple test circuit for it here:

JFET U404 model

 

You can reuse this model in your own design by adding it to "My Favorites" using the RMB.

Darrell

JFET U404 Model


JFETX
U404X
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Thanks Darrel, I will try it!

Thanks Darrel, I will try it!

 

Regards
Gyorgy